Flash back
les conferences de l´ISSCC Fev 1999 de la premiere presentation de l´EE de la PS2
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15.1 A Microprocessor with 128b CPU, 10 Floating-Point MACs, 4 Floating-Point Dividers, and MPEG2 Decoder 1:30 PM
K. Kutaragi, S. Okamoto, M. Suzuoki, T. Hiroi, M. Oka, A Ohba,
Y. Yamamoto, M. Furuhashi, M. Tanaka, T. Yutaka, T. Okada,
H. Magoshi, M. Nagamatsu1, Y. Urakawa1, M. Funyu1, A. Kunimatsu1,
H. Goto1, K. Hashimoto1, N. Ide1, H. Murakami1, Y. Ohtaguro1, A. Aono2
Sony Computer Entertainment, Inc., Tokyo, Japan
1Toshiba Corp. / 2Toshiba Microelectronics Corp., Kawasaki, Japan
A 250MHz microprocessor consists of a CPU core with 128b multimedia extensions, 10 floating-point multiplier accumulators, four floating-point dividers, an MPEG2 decoder, a 10-channel DMA controller, and other peripherals with 128b internal buses on one die. It contains 10.5M transistors in 17x14.1mm2 and dissipates 15W at 1.8V
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15.2 A High-Bandwidth Superscalar Microprocessor for Multimedia Applications 2:00 PM
M. Raam, R. Agarwal, K. Malik, H. Landman, H. Tago, T. Teruyama, T. Sakamoto, T. Yoshida1, S. Yoshioka1, Y. Fujimoto1, T. Kobayashi1, T. Hiroi2, M. Oka2, A. Ohba2, M. Suzuoki2, T. Yutaka2, Y. Yamamoto2
Toshiba Corp., San Jose, CA, / 1Kawasaki, Japan
2Sony Computer Entertainment, Inc., Tokyo, Japan
A 250MHz 2-way superscalar MIPS-compatible microprocessor for multimedia and networking applications with internal 8kB D-cache, 16kB
I-cache, 1kx128b scratch-pad RAM tightly coupled to the pipe and 128b internal datapaths. > 100 multimedia instructions are extended on a 10.9x6.3mm2 die in 0.18µm CMOS at 1.8V